Senior / Lead Design Verification Engineer (Formal & Simulation)
SiFive is seeking a Senior/Lead Design Verification Engineer to lead verification efforts for high-performance RISC-V silicon. The role requires a strong balance of formal verification and UVM-based simulation to ensure chip correctness. You will develop testplans, architect verification environments, and lead technical initiatives across complex subsystems. This is an onsite position in Ahmedabad, India, focusing on cutting-edge processor design.
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Experience
8+ years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
SiFive is seeking a Senior/Lead Design Verification Engineer to lead verification efforts for high-performance RISC-V silicon. The role requires a strong balance of formal verification and UVM-based simulation to ensure chip correctness. You will develop testplans, architect verification environments, and lead technical initiatives across complex subsystems. This is an onsite position in Ahmedabad, India, focusing on cutting-edge processor design.
TAL's take
High-impact, specialized engineering role at a well-regarded semiconductor company, requiring significant domain expertise in high-performance silicon verification.
The JD is extremely well-defined with clear expectations for technical stack, methodology, and project scope.
Must haves
- 8+ years experience in ASIC/SoC Design Verification
- Expertise in formal verification and SVA
- Mastery of SystemVerilog and UVM architectures
- Proficiency with industry tools like JasperGold, VCS, or Xcelium
- Experience with high-performance protocols like AXI or PCIe
Tools and skills
About the company
SiFive is a prominent company in the RISC-V ecosystem but does not meet the criteria for global tier-1 FAANG/equivalent status.