Senior Design Verification Engineer
Baya Systems is seeking a Senior Design Verification Engineer to join their team in Bengaluru. The role involves creating test plans and implementing UVM/SystemVerilog testbenches for complex IPs and SoC systems. The successful candidate will collaborate with design and software teams to debug failures and close coverage. This is a senior IC position requiring 8+ years of experience in hardware verification.
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Experience
8+ years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Baya Systems is seeking a Senior Design Verification Engineer to join their team in Bengaluru. The role involves creating test plans and implementing UVM/SystemVerilog testbenches for complex IPs and SoC systems. The successful candidate will collaborate with design and software teams to debug failures and close coverage. This is a senior IC position requiring 8+ years of experience in hardware verification.
TAL's take
Solid tier-2 semiconductor role with well-defined technical scope and seniority requirements.
Very specific role focused on hardware verification with a clear stack and well-defined responsibilities.
Must haves
- 8+ years of hands-on experience in verification
- Proficiency in Verilog and SystemVerilog
- Deep experience with UVM-based testbenches
- Experience with Python
- Knowledge of ARM AMBA protocols
Tools and skills
Nice to have: arm chi protocol, formal verification, emulation.
About the company
Baya Systems is a specialized semiconductor IP design services company.