Analog Layout Design Engineer
Altera is seeking an Analog Layout Design Engineer to contribute to complex analog and mixed-signal circuit layouts in the semiconductor domain. The role involves leading layout blocks, performing floorplanning, and executing design verification for reliability using TSMC N3 technology. The ideal candidate has at least three years of experience and works effectively with circuit design and process technology teams. This position is based in Bengaluru and requires a strong background in analog layout methodologies.
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Experience
3+ years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Altera is seeking an Analog Layout Design Engineer to contribute to complex analog and mixed-signal circuit layouts in the semiconductor domain. The role involves leading layout blocks, performing floorplanning, and executing design verification for reliability using TSMC N3 technology. The ideal candidate has at least three years of experience and works effectively with circuit design and process technology teams. This position is based in Bengaluru and requires a strong background in analog layout methodologies.
TAL's take
Role at a well-known semiconductor firm with a clear focus on advanced process nodes like TSMC N3.
The JD clearly defines the technical scope, specific technologies (TSMC N3), and the responsibilities within the analog layout domain.
Must haves
- Bachelor’s or Master’s degree in Electrical or Computer Engineering
- Minimum 3 years of hands-on experience in Analog layout design
- Experience working in TSMC N3 technology
- Ability to perform floorplanning and ESD design
- Knowledge of design verification tools for process design rules and reliability
Tools and skills
About the company
Altera is an established semiconductor company, now part of Intel, representing a strong industry player.
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