Senior Analog Layout Lead/Architect
Eximietas Design is hiring a Senior Analog Layout Lead to join their VLSI team in Bengaluru. The role focuses on delivering high-quality layouts for lower FINFET technology nodes, specifically TSMC 3nm and SERDES projects. Candidates must have expertise in IR drop, electromigration, and parasitic capacitance optimization using Cadence or Synopsys tools. The position requires a seasoned professional capable of mentoring and collaborating with cross-functional teams.
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Experience
8-12 years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Eximietas Design is hiring a Senior Analog Layout Lead to join their VLSI team in Bengaluru. The role focuses on delivering high-quality layouts for lower FINFET technology nodes, specifically TSMC 3nm and SERDES projects. Candidates must have expertise in IR drop, electromigration, and parasitic capacitance optimization using Cadence or Synopsys tools. The position requires a seasoned professional capable of mentoring and collaborating with cross-functional teams.
TAL's take
Solid tier-2 role in the specialized VLSI domain with clear requirements and defined senior scope.
Very well-defined role with specific technical node and tool requirements typical for analog layout design.
Must haves
- 8-12 years of experience in analog layout design
- Strong expertise in FINFET technology nodes
- Experience in IR drop and electromigration analysis
- Hands-on experience with Cadence or Synopsys layout tools
- Understanding of layout impact on circuit performance
Tools and skills
Nice to have: perl, skill.
About the company
Established VLSI design services company, fits tier 2 category as a specialized engineering provider.