DFT Lead
Mirafra Technologies is seeking a DFT Lead to join their semiconductor team in Bengaluru. The role involves managing scan insertion, MBIST, JTAG, and ATPG processes across block and fullchip levels. Candidates must possess deep expertise in industry-standard tools like Synopsys DFTMAX, Tessent, or Cadence Modus, alongside strong fault simulation and debug skills. Proficiency in scripting languages is required to support test pattern generation and validation.
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Experience
5-10 years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Mirafra Technologies is seeking a DFT Lead to join their semiconductor team in Bengaluru. The role involves managing scan insertion, MBIST, JTAG, and ATPG processes across block and fullchip levels. Candidates must possess deep expertise in industry-standard tools like Synopsys DFTMAX, Tessent, or Cadence Modus, alongside strong fault simulation and debug skills. Proficiency in scripting languages is required to support test pattern generation and validation.
TAL's take
Solid tier-2 semiconductor engineering firm offering a clear lead-level scope in a specialized technical domain.
The JD provides a highly specific technical stack and clearly defined functional areas within DFT.
Must haves
- 5-10 years of total experience
- 3+ years of relevant work experience in DFT
- Experience in scan, ATPG, MBIST, and JTAG
- Experience with Synopsys, Cadence, or Mentor Graphics DFT tools
- Expertise in coverage improvement and fault simulation with SDF
- Scripting proficiency in TCL, Shell, Perl, or Python
Tools and skills
About the company
Established specialized semiconductor services and solutions provider.
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