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OnsiteLeadsemiconductor

Lead RTL Engineer

EmployBengaluru, Karnataka, IndiaPosted 18 May 2026

Employ is a deep-tech semiconductor firm developing high-performance signal-processing ASICs for specialized markets. The Lead RTL Engineer will translate architectural specs into synthesizable SystemVerilog RTL and guide a small team through the full design cycle. The role demands hands-on expertise in RTL design, synthesis, and timing closure, alongside proven experience in ASIC tapeouts. It is a technical leadership position requiring the ability to drive design methodology and coordinate across verification and physical design teams.

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Experience

7+ years

Function

Engineering

Work mode

Onsite, India

Company

Tier 2

What you will work on

Employ is a deep-tech semiconductor firm developing high-performance signal-processing ASICs for specialized markets. The Lead RTL Engineer will translate architectural specs into synthesizable SystemVerilog RTL and guide a small team through the full design cycle. The role demands hands-on expertise in RTL design, synthesis, and timing closure, alongside proven experience in ASIC tapeouts. It is a technical leadership position requiring the ability to drive design methodology and coordinate across verification and physical design teams.

TAL's take

Quality 65/1005/5 clarityTier 2 company

Solid technical scope for a semiconductor role with clear leadership expectations, though the company brand impact is neutral.

The JD provides a crisp, specific description of the responsibilities, stack, and team leadership context.

Must haves

  • 7+ years of RTL design experience
  • Strong hands-on experience in SystemVerilog
  • At least 1 ASIC tapeout through GDSII
  • Experience with synthesis, STA, timing closure, and SDC constraints
  • Exposure to processor, DSP, vector, or datapath-heavy designs
  • Familiarity with 28nm or below process nodes
  • Ability to lead a small team while remaining hands-on

Tools and skills

systemverilogasicsynthesisstatiming closuresdc constraints

Nice to have: vliw, vector processor design, sva, vivado.

About the company

Unfamiliar company, default mid-tier assigned as per instructions.

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