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OnsiteMid Levelsemiconductor

FPGA/SoC Design Engineer

Indian Institute of ScienceBengaluru, Karnataka, IndiaPosted 20 May 2026

The Indian Institute of Science is hiring a Digital Design Engineer to work on FPGA/SoC projects in a research environment. The role involves contributing to chip design, tapeout cycles, and advanced technology research. Candidates must have strong digital design fundamentals and proficiency with Xilinx Vivado, Verilog, and AXI protocols. This position offers access to academic resources and interaction with domain experts.

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Experience

Experience not specified

Function

Engineering

Work mode

Onsite, India

Company

Tier 2

What you will work on

The Indian Institute of Science is hiring a Digital Design Engineer to work on FPGA/SoC projects in a research environment. The role involves contributing to chip design, tapeout cycles, and advanced technology research. Candidates must have strong digital design fundamentals and proficiency with Xilinx Vivado, Verilog, and AXI protocols. This position offers access to academic resources and interaction with domain experts.

TAL's take

Quality 65/1005/5 clarityTier 2 company

High-impact research environment at a top-tier institution, though lack of commercial product scale slightly impacts rank.

Highly specific technical requirements provided with clear domain alignment.

Must haves

  • Strong digital circuit design fundamentals
  • Hands-on experience with Xilinx Vivado and PS-PL SoC architecture
  • Proficiency in Verilog
  • Experience with Vivado Block Design and IP integration
  • Proficiency in AXI-Lite and AXI-Full protocols

Tools and skills

verilogxilinx vivadops-pl architectureaxi-liteaxi-fullreset logicclockingip designddrbramfifodmauartspii2ci2sgpioethernetadc

Nice to have: vhdl, mpsoc, rfsoc, hdmi, csi, dsi, fpga implementation, vio, ila, high-speed adcs/dacs, lab instruments.

About the company

Prestigious academic and research institution, treated as tier 2 for engineering roles.