Lead Design Verification Engineer

Altera is seeking a Lead Design Verification Engineer to own the functional logic verification for FPGA projects. The role involves developing verification plans, building complex test benches, and ensuring coverage against microarchitecture specifications. The successful candidate will leverage UVM/System Verilog methodologies to perform pre-silicon validation and debug in a collaborative cross-functional environment. This is a technical leadership position requiring deep expertise in the verification lifecycle and simulation infrastructure.

• BS, MS or PhD in Electrical or Computer Science Engineering
• 8+ years of technical experience
• Pre-Silicon Validation/Verification experience
• OVM/UVM and System Verilog proficiency
• Constrained random verification methodologies

Nice to have: fpga architecture, fpga prototyping, verification architecture, soc verification.

Altera is a well-established player in the FPGA market, now part of Intel, representing a strong engineering-focused product company.