Physical Design Engineer
Chiplogic Technologies is seeking a Senior Physical Design Engineer to lead multi-voltage SoC implementation in the semiconductor domain. The role involves managing the full backend design flow, from floorplanning and synthesis to timing closure and physical verification. Candidates must demonstrate deep expertise in low-power methodologies and industry-standard EDA tools like Cadence Innovus and Ansys RedHawk. This is a technical role focused on complex silicon design cycles for IoT and AI applications.
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Experience
6+ years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Chiplogic Technologies is seeking a Senior Physical Design Engineer to lead multi-voltage SoC implementation in the semiconductor domain. The role involves managing the full backend design flow, from floorplanning and synthesis to timing closure and physical verification. Candidates must demonstrate deep expertise in low-power methodologies and industry-standard EDA tools like Cadence Innovus and Ansys RedHawk. This is a technical role focused on complex silicon design cycles for IoT and AI applications.
TAL's take
Solid tier-2 semiconductor services firm with a clearly defined technical scope for an experienced physical design role.
Highly specific job description detailing exact tools, methodology, and design lifecycle responsibilities for a physical design engineer.
Must haves
- Expertise in Low Power SoC Physical Design
- Experience with multi-voltage/multi-power domain implementation
- Proficiency in Cadence implementation tools (Innovus, Genus, Tempus)
- Experience in STA and physical verification signoff
- Strong Tcl scripting and automation skills
Tools and skills
About the company
Established service company specializing in semiconductor design, fits criteria for an established mid-stage product and services firm.