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OnsiteDirectorsemiconductor

Director - ASIC/SoC Design Manager

QualcommHyderabad, Telangana, IndiaPosted 16 May 2026

This Director role at Qualcomm in Hyderabad involves leading the development of next-generation SoCs for mobile and adjacent products. The candidate will oversee the full VLSI design lifecycle, from architecture and RTL development to design convergence and post-silicon bring-up. The position requires deep expertise in digital design, synthesis, and formal verification, alongside strong leadership capabilities to mentor teams. The role demands extensive experience in SoC integration and a proven track record of bringing chips to commercialization.

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Experience

17+ years

Function

Engineering

Work mode

Onsite, India

Company

Tier 1

What you will work on

This Director role at Qualcomm in Hyderabad involves leading the development of next-generation SoCs for mobile and adjacent products. The candidate will oversee the full VLSI design lifecycle, from architecture and RTL development to design convergence and post-silicon bring-up. The position requires deep expertise in digital design, synthesis, and formal verification, alongside strong leadership capabilities to mentor teams. The role demands extensive experience in SoC integration and a proven track record of bringing chips to commercialization.

TAL's take

Quality 85/1005/5 clarityTier 1 company

High-level director role at a tier-1 semiconductor company with clear scope and significant technical leadership responsibilities.

The JD provides very specific technical requirements, SoC development lifecycle stages, and clear leadership expectations.

Salaries at Qualcomm

27.4 LPA average

Based on 637 Grapevine salary entries for Qualcomm.

View all salaries

Engineering

0 - 2 years | L1

15 LPA average

Range: 12 - 20 LPA

Engineering

2 - 4 years | L1

18 LPA average

Range: 8 - 32 LPA

Engineering

4 - 6 years | L1

21 LPA average

Range: 10 - 31 LPA

Engineering

6 - 8 years | Lead

30 LPA average

Range: 20 - 50 LPA

Must haves

  • 17+ years experience in SoC design
  • Expertise in Synopsys Design Compiler and Cadence LEC
  • Strong understanding of timing closure
  • Experience in microarchitecture and RTL development
  • Knowledge of AHB and AXI bus protocols
  • Post silicon bring-up and debug experience

Tools and skills

vlsirtlahbaxisynopsys design compilercadence lecformal verificationtiming closure

Nice to have: memory controller design, microprocessors, chip io design, packaging.

About the company

Qualcomm is a major global semiconductor leader and tier 1 hardware engineering firm.

Posts mentioning Qualcomm