Senior Analog Layout Professionals
Eximietas Design is hiring Senior Analog Layout Engineers to join their VLSI team in Bengaluru. The role involves optimizing high-quality layouts for performance using advanced FINFET nodes like TSMC 3nm and SERDES. Candidates are expected to have strong experience with Cadence and Synopsys tools, alongside knowledge of EM and IR drop constraints. This position requires deep expertise in physical design and cross-functional collaboration.
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Experience
8-12 years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Eximietas Design is hiring Senior Analog Layout Engineers to join their VLSI team in Bengaluru. The role involves optimizing high-quality layouts for performance using advanced FINFET nodes like TSMC 3nm and SERDES. Candidates are expected to have strong experience with Cadence and Synopsys tools, alongside knowledge of EM and IR drop constraints. This position requires deep expertise in physical design and cross-functional collaboration.
TAL's take
Solid specialized technical role in semiconductor design with clear requirements and defined experience bracket.
Highly specific JD focusing on analog layout design with clear technical stack requirements and relevant industry nodes.
Must haves
- 8-12 years of experience
- Expertise in lower FINFET technology nodes
- Experience in IR drop and Electromigration
- Understanding of layout impact on circuit performance
- Hands-on experience with Cadence or Synopsys tools
Tools and skills
Nice to have: perl, skill.
About the company
Unfamiliar company, default mid-tier assigned for specialized design services firms.