Senior Design Engineer
Silicon Labs is seeking a Senior Design Engineer in Singapore to join their digital design team for low-power MCU and Wireless SoC products. The role involves full lifecycle responsibility for digital block architecture, RTL implementation, and SoC integration. Candidates will work on block-level and SoC infrastructure verification, including mixed-signal modeling and firmware development for validation. This position requires strong engineering fundamentals and experience with SoC or ASIC design flows.
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Experience
Experience not specified
Function
Engineering
Work mode
Onsite, Singapore
Company
Tier 2
What you will work on
Silicon Labs is seeking a Senior Design Engineer in Singapore to join their digital design team for low-power MCU and Wireless SoC products. The role involves full lifecycle responsibility for digital block architecture, RTL implementation, and SoC integration. Candidates will work on block-level and SoC infrastructure verification, including mixed-signal modeling and firmware development for validation. This position requires strong engineering fundamentals and experience with SoC or ASIC design flows.
TAL's take
Solid role at a well-regarded, established public semiconductor company with clearly defined technical responsibilities.
Highly specific engineering responsibilities listed with distinct requirements for RTL, SoC integration, and verification tasks.
Must haves
- Detailed block architecture and design of digital circuits
- In-depth understanding of block requirements and interfaces
- Implement design through RTL coding
- Experience with SoC integration and infrastructure
- Block level verification using directed and random methods
- Develop embedded firmware for SoC validation
Tools and skills
Nice to have: cortexm, uvm, python, perl, tcl, amba, dft, scan test, atpg, mbist.
About the company
Established public semiconductor company with global operations, though not a top-tier FAANG/flagship unicorn.
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