Senior Analog Layout Design
Eximietas Design is hiring Senior Analog Layout Design Engineers to join their VLSI team in Bengaluru. The role focuses on delivering high-quality layouts for complex designs including IR drop and parasitic optimization. Candidates must have deep expertise in lower FINFET technology nodes and standard industry CAD tools. Scripting experience and knowledge of advanced nodes like TSMC 3nm are highly valued.
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Experience
8-12 years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Eximietas Design is hiring Senior Analog Layout Design Engineers to join their VLSI team in Bengaluru. The role focuses on delivering high-quality layouts for complex designs including IR drop and parasitic optimization. Candidates must have deep expertise in lower FINFET technology nodes and standard industry CAD tools. Scripting experience and knowledge of advanced nodes like TSMC 3nm are highly valued.
TAL's take
Solid professional role in the VLSI sector requiring niche expertise, though company brand is not globally recognized.
Very crisp JD with clear technical requirements, specific technology nodes, and defined responsibilities.
Must haves
- 8-12 years of experience in analog layout design
- Expertise in lower FINFET technology nodes
- Experience in IR drop and electromigration
- Hands-on experience with Cadence or Synopsys tools
- Ability to deliver high-quality layouts under tight constraints
Tools and skills
Nice to have: tsmc 3nm, serdes, perl, skill.
About the company
Unfamiliar design services company in the VLSI space, default mid-tier.