Principal SerDes Analog Design
Mulya Technologies is seeking a Principal Analog Design Engineer to focus on 100Gbps+ wireline SerDes technologies. The role involves full-cycle development from initial specification and transistor-level design through layout supervision and silicon characterization. The successful candidate will work with advanced CMOS processes for applications like 5G, AI, and IoT. This is a technical individual contributor role requiring deep expertise in high-speed analog circuits.
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Experience
10+ years
Function
Engineering
Work mode
Hybrid, India
Company
Tier 2
What you will work on
Mulya Technologies is seeking a Principal Analog Design Engineer to focus on 100Gbps+ wireline SerDes technologies. The role involves full-cycle development from initial specification and transistor-level design through layout supervision and silicon characterization. The successful candidate will work with advanced CMOS processes for applications like 5G, AI, and IoT. This is a technical individual contributor role requiring deep expertise in high-speed analog circuits.
TAL's take
Solid technical role at a specialized semiconductor firm, though the company brand is not globally recognized.
Very clear expectations for SerDes design in specific advanced CMOS processes.
Must haves
- 10+ years experience in high-performance analog or mixed-signal IC development
- Familiarity with high-speed analog design and building block circuits for SERDES
- Track record of successfully taking designs to production
- Experience evaluating silicon on bench using standard lab equipment
- Familiarity with Cadence schematic capture, virtuoso, Spectre and/or HSPICE
- Experience with layout parasitic extraction tools and layout dependent impairments
Tools and skills
Nice to have: matlab.
About the company
Unfamiliar company, default mid-tier.
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