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OnsiteMid Levelsemiconductor

DFT Engineer

Neurealmmulti, Karnataka, IndiaPosted 19 May 2026

Neurealm is hiring a DFT Engineer to work on semiconductor design validation across multiple locations. The role focuses on scan insertion, ATPG vector generation, MBIST, and boundary scan tasks. Candidates must have experience with RTL and netlist-based insertion flows and proficiency in DFT tools and scripting. Working with ATE teams during the bring-up phase is a core responsibility.

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Experience

3+ years

Function

Engineering

Work mode

Onsite, India

Company

Tier 2

What you will work on

Neurealm is hiring a DFT Engineer to work on semiconductor design validation across multiple locations. The role focuses on scan insertion, ATPG vector generation, MBIST, and boundary scan tasks. Candidates must have experience with RTL and netlist-based insertion flows and proficiency in DFT tools and scripting. Working with ATE teams during the bring-up phase is a core responsibility.

TAL's take

Quality 50/1005/5 clarityTier 2 company

Role has clear technical requirements and defined scope, but company is unfamiliar.

Very clear and specific technical requirements for a specialized DFT engineering role.

Must haves

  • Hands on experience in Inserting Scan and generating ATPG vectors
  • In-depth experience in analysing and improving scan coverage
  • Hands on experience in MBIST insertion and simulation
  • Experience in Boundary Scan, inserting tap controller and P1500
  • Experience in RTL based and netlist-based insertion flows
  • Good exposure to DFT tools from Mentor, Synopsys and Cadence
  • Good scripting know-how in Perl and TCL

Tools and skills

scan insertionatpg vectorsstuck-at faultsat-speed faultsmbistboundary scantap controllerp1500rtl insertionnetlist insertiondft simulationsdfsynthesisformal verificationtdlateperltcl

Nice to have: static timing analysis.

About the company

unfamiliar company, default mid-tier