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Senior Memory Mask Design Engineer

NVIDIABengaluru, Karnataka, IndiaPosted 16 May 2026

NVIDIA is seeking a Senior Digital/Memory Mask Design Engineer to join their team in Bengaluru working on advanced semiconductor process nodes. The role involves leading the architecture and physical layout of complex memory subsystems and conducting physical verification activities. Candidates must have extensive experience in high-performance memory layout using industry-standard EDA tools like Cadence. This position offers the opportunity to contribute to critical hardware powering AI and GPU technologies.

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Experience

6+ years

Function

Engineering

Work mode

Onsite, India

Company

Tier 1

What you will work on

NVIDIA is seeking a Senior Digital/Memory Mask Design Engineer to join their team in Bengaluru working on advanced semiconductor process nodes. The role involves leading the architecture and physical layout of complex memory subsystems and conducting physical verification activities. Candidates must have extensive experience in high-performance memory layout using industry-standard EDA tools like Cadence. This position offers the opportunity to contribute to critical hardware powering AI and GPU technologies.

TAL's take

Quality 90/1005/5 clarityTier 1 company

Tier 1 global company with highly specific, senior-level technical ownership in advanced semiconductor design.

The JD clearly defines responsibilities, technology nodes, and specific domain expertise required for the role.

Salaries at NVIDIA

29.5 LPA average

Based on 43 Grapevine salary entries for NVIDIA.

View all salaries

Engineering

0 - 2 years | IC2

14 LPA average

Range: 5 - 21 LPA

Engineering

2 - 4 years | IC3

21 LPA average

Range: 20 - 22 LPA

Engineering

4 - 6 years | IC3

29 LPA average

Range: 23 - 35 LPA

Engineering

6 - 8 years | SDE 2

30 LPA average

Range: 17 - 37 LPA

Must haves

  • 6+ years experience in memory layout in advanced CMOS process
  • Detailed knowledge of industry standard EDA tools for Cadence
  • Experience with layout of high-performance memories of various types
  • Knowledge of bitcells, decoders, LIO, matching devices, and signal shielding
  • Experience with floor planning, block level routing and macro level assembly
  • Detailed knowledge of top level verification including EM/IR quality checks

Tools and skills

cadencecmosdrclvsbit-cell arraysmemory layoutem/ir quality checksfloor planningblock level routing

About the company

NVIDIA is a Tier 1 global semiconductor and technology company.

Posts mentioning NVIDIA