Senior Analog Layout Design Engineers / Leads
Eximietas Design is hiring Senior Analog Layout Design Engineers in Bengaluru for their VLSI team. The role focuses on delivering high-quality layouts using advanced FINFET nodes like TSMC 3nm and handling complex parasitic optimizations. Candidates must be proficient in Cadence or Synopsys tools and have deep experience in IR drop and EM analysis. The position requires strong cross-functional communication and delivers high-performance analog layouts.
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Experience
8-12 years
Function
Engineering
Work mode
Onsite, India
Company
Tier 2
What you will work on
Eximietas Design is hiring Senior Analog Layout Design Engineers in Bengaluru for their VLSI team. The role focuses on delivering high-quality layouts using advanced FINFET nodes like TSMC 3nm and handling complex parasitic optimizations. Candidates must be proficient in Cadence or Synopsys tools and have deep experience in IR drop and EM analysis. The position requires strong cross-functional communication and delivers high-performance analog layouts.
TAL's take
Solid tier-2 engineering services role with clearly defined technical requirements and specific tool stack expectations.
Very crisp JD with clear technical requirements and domain-specific expectations.
Must haves
- 8-12 years of experience in analog layout design
- Expertise in lower FINFET technology nodes
- Experience in IR drop and Electromigration optimization
- Hands-on experience with Cadence or Synopsys layout tools
- Ability to deliver high-quality layouts under tight constraints
Tools and skills
Nice to have: perl, skill.
About the company
Established design services company, though not a top-tier global or massive Indian product brand.